Index of /orangepi-build/kernel/orange-pi-6.1-rk35xx/drivers/misc/habanalabs/include/goya/asic_reg/
../
cpu_ca53_cfg_masks.h 04-Dec-2025 19:36 11062
cpu_ca53_cfg_regs.h 04-Dec-2025 19:36 2020
cpu_if_regs.h 04-Dec-2025 19:36 1520
cpu_pll_regs.h 04-Dec-2025 19:36 3733
dma_ch_0_masks.h 04-Dec-2025 19:36 19405
dma_ch_0_regs.h 04-Dec-2025 19:36 7848
dma_ch_1_regs.h 04-Dec-2025 19:36 7848
dma_ch_2_regs.h 04-Dec-2025 19:36 7848
dma_ch_3_regs.h 04-Dec-2025 19:36 7848
dma_ch_4_regs.h 04-Dec-2025 19:36 7848
dma_macro_masks.h 04-Dec-2025 19:36 4146
dma_macro_regs.h 04-Dec-2025 19:36 6749
dma_nrtr_masks.h 04-Dec-2025 19:36 10312
dma_nrtr_regs.h 04-Dec-2025 19:36 8560
dma_qm_0_masks.h 04-Dec-2025 19:36 23975
dma_qm_0_regs.h 04-Dec-2025 19:36 6661
dma_qm_1_regs.h 04-Dec-2025 19:36 6661
dma_qm_2_regs.h 04-Dec-2025 19:36 6661
dma_qm_3_regs.h 04-Dec-2025 19:36 6661
dma_qm_4_regs.h 04-Dec-2025 19:36 6661
goya_blocks.h 04-Dec-2025 19:36 82732
goya_masks.h 04-Dec-2025 19:36 10138
goya_regs.h 04-Dec-2025 19:36 3647
ic_pll_regs.h 04-Dec-2025 19:36 3729
mc_pll_regs.h 04-Dec-2025 19:36 3729
mme1_rtr_masks.h 04-Dec-2025 19:36 37014
mme1_rtr_regs.h 04-Dec-2025 19:36 12514
mme2_rtr_regs.h 04-Dec-2025 19:36 12514
mme3_rtr_regs.h 04-Dec-2025 19:36 12514
mme4_rtr_regs.h 04-Dec-2025 19:36 12668
mme5_rtr_regs.h 04-Dec-2025 19:36 12668
mme6_rtr_regs.h 04-Dec-2025 19:36 12668
mme_cmdq_masks.h 04-Dec-2025 19:36 19549
mme_cmdq_regs.h 04-Dec-2025 19:36 5023
mme_masks.h 04-Dec-2025 19:36 85229
mme_qm_masks.h 04-Dec-2025 19:36 23811
mme_qm_regs.h 04-Dec-2025 19:36 6575
mme_regs.h 04-Dec-2025 19:36 44548
mmu_masks.h 04-Dec-2025 19:36 7476
mmu_regs.h 04-Dec-2025 19:36 1663
pci_nrtr_masks.h 04-Dec-2025 19:36 10312
pci_nrtr_regs.h 04-Dec-2025 19:36 8254
pcie_aux_regs.h 04-Dec-2025 19:36 9193
pcie_wrap_regs.h 04-Dec-2025 19:36 11726
psoc_emmc_pll_regs.h 04-Dec-2025 19:36 3757
psoc_etr_regs.h 04-Dec-2025 19:36 4178
psoc_global_conf_masks.h 04-Dec-2025 19:36 26041
psoc_global_conf_regs.h 04-Dec-2025 19:36 29057
psoc_mme_pll_regs.h 04-Dec-2025 19:36 3753
psoc_pci_pll_regs.h 04-Dec-2025 19:36 3753
psoc_spi_regs.h 04-Dec-2025 19:36 5238
psoc_timestamp_regs.h 04-Dec-2025 19:36 1871
sram_y0_x0_rtr_regs.h 04-Dec-2025 19:36 2895
sram_y0_x1_rtr_regs.h 04-Dec-2025 19:36 2895
sram_y0_x2_rtr_regs.h 04-Dec-2025 19:36 2895
sram_y0_x3_rtr_regs.h 04-Dec-2025 19:36 2895
sram_y0_x4_rtr_regs.h 04-Dec-2025 19:36 2895
stlb_masks.h 04-Dec-2025 19:36 5432
stlb_regs.h 04-Dec-2025 19:36 1747
tpc0_cfg_masks.h 04-Dec-2025 19:36 80427
tpc0_cfg_regs.h 04-Dec-2025 19:36 34626
tpc0_cmdq_masks.h 04-Dec-2025 19:36 19611
tpc0_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc0_eml_cfg_masks.h 04-Dec-2025 19:36 17981
tpc0_eml_cfg_regs.h 04-Dec-2025 19:36 12122
tpc0_nrtr_masks.h 04-Dec-2025 19:36 10349
tpc0_nrtr_regs.h 04-Dec-2025 19:36 8564
tpc0_qm_masks.h 04-Dec-2025 19:36 23893
tpc0_qm_regs.h 04-Dec-2025 19:36 6657
tpc1_cfg_regs.h 04-Dec-2025 19:36 34626
tpc1_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc1_qm_regs.h 04-Dec-2025 19:36 6657
tpc1_rtr_regs.h 04-Dec-2025 19:36 12352
tpc2_cfg_regs.h 04-Dec-2025 19:36 34626
tpc2_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc2_qm_regs.h 04-Dec-2025 19:36 6657
tpc2_rtr_regs.h 04-Dec-2025 19:36 12352
tpc3_cfg_regs.h 04-Dec-2025 19:36 34626
tpc3_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc3_qm_regs.h 04-Dec-2025 19:36 6657
tpc3_rtr_regs.h 04-Dec-2025 19:36 12352
tpc4_cfg_regs.h 04-Dec-2025 19:36 34626
tpc4_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc4_qm_regs.h 04-Dec-2025 19:36 6657
tpc4_rtr_regs.h 04-Dec-2025 19:36 12352
tpc5_cfg_regs.h 04-Dec-2025 19:36 34626
tpc5_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc5_qm_regs.h 04-Dec-2025 19:36 6657
tpc5_rtr_regs.h 04-Dec-2025 19:36 12352
tpc6_cfg_regs.h 04-Dec-2025 19:36 34626
tpc6_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc6_qm_regs.h 04-Dec-2025 19:36 6657
tpc6_rtr_regs.h 04-Dec-2025 19:36 12352
tpc7_cfg_regs.h 04-Dec-2025 19:36 34626
tpc7_cmdq_regs.h 04-Dec-2025 19:36 5085
tpc7_nrtr_regs.h 04-Dec-2025 19:36 8564
tpc7_qm_regs.h 04-Dec-2025 19:36 6657
tpc_pll_regs.h 04-Dec-2025 19:36 3733